LSI版图自动布局布线系统

An Automatic Layout System for LSI Chip Design

本文介绍一个基于积木块方式的大规模专用集成电路芯片版图设计系统。该系统不仅采用了近期国际上先进的布局布线算法，而且引入了时延驱动布局、电源网平面化布线、通道最优划分和排序、单元动态调整以及详细布线优化等新的布图优化技术。

A building-block layout system for large scale ASIC chip design is presented in this paper. A few advanced placement and routing algorithms of the world are adopted and some new techniques for layout optimization such as timing-driven placement, planar routing for P/G nets, optimal channel definition and ordering, dynamic module shifting and optimization of detailed routing are herewith introduced. The staisfactory results gaining from the experiments have ensured the good performance of the system.