摘要
给出了两种实时图象3×3卷积的设计方案。为避免使用昂贵的乘法器集成电路,本文利用硬件查找表方案来降低成本、实时实现相乘运算。其中:方案一根据乘法分配律来简化硬件查找表的构成;方案二通过将8bit的灰度图象数据看成8个位面二值图象的叠加来实现方案的简化。文中还.提供了卷积器中可变行延迟、卷积数据变换后处理电路的设计方案。两种方案均可由市场有售的普通型号小规模集成电路较低成本实现。
wo kinds of design schemes for real-time image 3×3 convolver are presented in this paper. To avoid the use of costly multiplication IC, the technique of hardware lockup table to realize mutiplication in low cost and real-time is used in these schemes, The first scheme is to simplify hardware lockup table based on the multiplication allocating rule; and the second scheme is to transform 8 bit image data into the sum of 8 bit-plane binary images for simplification. The design schemes for the changeable line delay unit and the post-processing unit for data transformation in the convolver are also proposed in this paper. All of two schemes can be realized with the common standard LSI chips available in the market.
出处
《数据采集与处理》
CSCD
1994年第3期171-177,共7页
Journal of Data Acquisition and Processing
关键词
图象处理
卷积
3×3卷积器
设计
image processing
convolutions
multiplying circuits
lockup table
bit-plane