基于新型D触发器的双模前置分频器

A Novel Dual Modulus Prescaler Based on New D Flip-Flop

在锁相环频率合成器中 ,双模前置分频器是一个速度瓶颈。分析了双模前置分频器的工作原理 ,提出了提高其工作速度的方法 ,包括给出一种新型高速CMOS动态D触发器的设计以及同步分频器的改进。经CadenceSpectre仿真 ,在0 .8um CMOS工艺 ,电源电压为 5V的条件下 ,最高频率达到了 2 .0GHZ ,其速度和集成度远远超过静态CMOS电路。

In PLL frequency synthesizers, dual modulus prescaler is a bottleneck in achieving a higher operation speed. Through analyzing its work principle, we find the method to raise the speed: use a novel CMOS dynamic D flip-flop and an improved synchronous frequency divider. The simulation results of the dual modulus prescaler, implemented in a 0.8um CMOS process, show a maximum 2.0GHz operation rate at 5V.The speed and integration of this circuit are much better than the static CMOS circuit.