基于并行流水的转发引擎设计与性能分析

Parallel Pipeline Forwarding Engine Design and Performance Evaluation

光通信技术对核心路由器报文转发能力不断提出更高的要求。10Gbps光传输技术已经使现有的各种软硬件路由查找方法成为核心路由器转发能力的瓶颈,而更高性能的光传输技术则已经突破了存储器访问速度的极限,使得基于单片存储器的路由转发方法无法应付未来日益增长的需求。在硬件存储器价格非常低的前提下,提出一种使用多个存储器并行流水查找的硬件转发实现结构。通过使用Internet上真实报文数据进行的性能模拟可以看出,随着并行度的增加,整个转发结构可以获得近似于线性的性能加速比。

With the rapid development of communication technology, optical transmit technique demands higher requirement of the core router's forwarding performance. OC192 POS interfaces have made the core router's forwarding engine a new bottleneck. Further development of optical transmit technique has exceeded the maximum accessing ability of DRAM, which makes impossible the design of the new forwarding engine with one chip of DRAM. New hardware parallel forwarding engine design is offered on the basis of Gupat's DIR-24-8-BASIC forwarding architecture, taking advantage of the parallel of multiplex DRAM chips. In order to get really performance of the parallel forwarding engine design, IP packet header trace and routing table's dump of Internet core router node are used as the input of the target system's simulator. The result shows that the parallel forwarding engine can achieve linear speedup with the increase of parallel basic forwarding tables.