一个电路版图自动设计系统

An Automatic Circuit Layout Design System

本文描述一个电路版图的自动设计系统。它将具有高级设计描述的模块分解成规模较小、易处理的单元，通过对单元进行平面规划、合理安置和多次转换后，自动地产生这些单元版图的ＣＩＦ文件。这是一个完全自动地将高级设计描述的电路转换成电路几何描述的过程．

An Automatic circuit layout design system is described in this paper. In the system the module described in high level design description is decomposed into easy manipulated cells with small scale.The disposal of these cells are made reasonable through floor planning.Thcn the CIF file of the layout of these cells is generated automatically through several translations.This is a procedure in which the circuit with high level design description to be designed is translated into geometric description of the circuit automatically.