标准CMOS工艺集成肖特基二极管设计与实现(英文)

Design and Fabrication of Schottky Diode with Standard CMOS Process

提出了一种在标准CMOS工艺上集成肖特基二极管的方法 ,并通过MPW在charted 0 35 μm工艺中实现 .为了减小串连电阻 ,肖特基的版图采用了交织方法 .对所设计的肖特基二极管进行了实测得到I V ,C V和S参数 ,并计算得出所测试肖特基二极管的饱和电流、势垒电压及反向击穿电压 .最后给出了可用于SPICE仿真的模型 .

Design and fabrication of Schottky barrier diodes (SBD) with a commercial standard 0 35μm CMOS process are described.In order to reduce the series resistor of Schottky contact,interdigitating the fingers of schottky diode layout is adopted.The I-V,C-V ,and S parameter are measured.The parameters of realized SBD such as the saturation current,breakdown voltage,and the Schottky barrier height are given.The SPICE simulation model of the realized SBDs is given.