FPGA+双DSP结构的雷达信号采集处理系统设计

Design of Radar Signal Sampling and Processing System with FPGA+Dual DSP

提出了一种基于PCI总线的采用FPGA+双DSP结构的雷达信号采集处理系统,FPGA芯片XCV100E负责控制采样并作为信号的预处理单元,双超级哈佛结构(SHARC)数字信号处理器ADSP21065L构成高速处理单元,PCI接口芯片PCI9054实现标准的32位PCI总线接口,构成了一个用于高频地波雷达信号采集处理的通用标准化硬件平台。该方案充分发挥了不同处理器件的优点,具有运算能力强、接口方便和编程灵活的特点。实验证明,系统能够满足高频地波雷达信号实时采集处理的要求。

A radar signal sampling and processing system with FPGA+dual DSP based on PCI bus is designed. The FPGA chip(XCV100E) controls the sampling and performs the pre-processing, while the dual SHARC digital signal processors ADSP-21065L act as the high speed processing module,PCI9054 chip interfacing with the 32 bit PCI bus. This method has more advantages in the processing speed, interface and programming than the traditional radar signal sampling and processing system. The experimentation demonstrates this system can meet the requirement of the high frequency ground wave radar.