摘要
本文研究一种锁相环MSK调制器的性能。文中详细分析了AFC环路非线性产生相位拖尾的机理及对系统性能的影响。计算机模拟结果表明,这种相位拖尾引入的系统信噪比恶化量,在用相干解调时最大,鉴频解调时居中,而差分解调时最小。最后给出了一个工作于1.5 GHz频段的锁相环MSK调制器的硬件设计及实现。
In this paper, performances of a phase-locked loop MSK modulator are studied. The phase tails introduced by the AFC loop and its effects on the system performances are discussed in detail. Three demodulation schemes are considered. The computer simulations show that the performance degradation is minor to the differential demodulation system, acceptable to the discriminating demodulation system, but severe to the coherent demodulation system.A modulator is realized at 1.5 GHz, which may transmit at any frequencies in the range of 1427MHz-1530MHz with 1MHz steps.
出处
《通信学报》
EI
CSCD
北大核心
1989年第4期47-54,73,共9页
Journal on Communications