摘要
在运用同伦算法进行逆变器PWM消谐方程实时求解过程中,矩阵求逆是关键。通过对上三角矩阵求逆算法的研究,提出了一种适合ASIC实现的基于二维心动阵列的矩阵求逆并行结构。运用硬件描述语言(VHDL)对其建模,并通过Synopsys的DesignCompile综合和Cadence的NC-Sim对其进行综合后仿真。仿真结果表明,该并行结构能够在 2n+1个时钟周期内完成n阶矩阵求逆,而传统的串行计算至少需要n3个时钟周期。
The inverse matrix calculation is the key to solve harmonic elimination PWM model of inverter based on Homotopy algorithm. In light of the analysis of the algorithm of up-triangle matrix’s inverse,a two-dimension systolic array structure for ASIC implementation is introduced. The structure is modeled by VHDL, synthesized by Design Compiler of Synopsys and simulated by NC-SIM of Cadence.The result shows this parallel structure can finish n-order matrix inverse calculation in 2n+1 clocks, but traditional serial computation needs n^3 clocks.
出处
《重庆大学学报(自然科学版)》
EI
CAS
CSCD
北大核心
2005年第3期26-29,共4页
Journal of Chongqing University
基金
国家自然科学基金资助项目(50007001)
关键词
消谐
ASIC
三角矩阵
求逆
harmonic elimination
ASIC
triangle matrix
inverse matrix calculation