摘要
提出了一种新型的 Si COIMESFET器件结构 ,即介质槽隔离 Si COIMESFET。模拟结果表明 ,新型结构器件与常规平面 Si COI MESFET器件相比 ,击穿电压得到很大提高 ,从 3 80 V提高到近 1 1 0 0 V,而饱和漏电流和跨导下降。但通过器件结构的优化设计可以保障在击穿电压提高的同时漏电流和跨导不会发生大的退化。该器件结构为高温、抗辐照和大功率集成电路研制打下基础。
A new type of SiCOI MESFET device s tructure, SiCOI MESFET with dielectric groove isolation, is presented. Simulatio n results show that the breakdown voltage of new type structure gains a great en hancement relative to that of conventional planar structure, from 380 V to nearl y 1 100 V, but the saturate drain current and transconductance decrease. However , it is ensured that a large decrease of the drain characteristics doesn't occur while a large increase of the breakdown voltage can be achieved by optimizing t he device structure of SiCOI MESFET.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
2005年第1期60-64,共5页
Research & Progress of SSE
基金
预研项目 (4 13 0 80 60 10 6)支持研究