一种14位、1.4MS/s、多位量化的级联型Σ△调制器

A 14-bit, 1.4 MS/s, Multi bit Cascaded ΣΔ Modulator

在 0 .6μm CMOS工艺条件下设计了一种适合 DECT(Digital Enhanced Cordless Telephone)标准的 1 .4MS/s Nyquist转换速率、1 4位分辨率模数转换器的ΣΔ调制器。该调制器采用了多位量化的级联型 (2 -1 -1 4b)结构 ,通过 Cadence Spectre S仿真验证 ,在采样时钟为 2 5 MHz和过采样率为 1 6的条件下 ,该调制器可以达到 86.7d B的动态范围 ,在 3 .3 V电源电压下其总功耗为 76m W。

This paper presen ts a 14-b 1.4 MS/s ΣΔ modulator which i s suitable for the Digital Enhanced Cordl ess Telephone standard. The modulator ha s a structure of 2-1-1 with a 4-bit quan tizer at the last stage. The simulation result shows that this multibit cascaded ΣΔ modulator achieves dynamic range of 86.7 dB at a sampling rate of 25 MHz and an oversampling ratio of 16. The modula tor designed in a 0.6 μm CMOS technology has a power consumption of 76 mW with a single 3.3 V power supply.