摘要
文章给出了并行可重置Huffman编码器IP核的实现方案。该方案提供了码表配置功能可在不同的应用,场合配置不同的码表,适应不同的需要;同时通过改善Huffman编码器中关键的变长码流向定长码流转换时的控制逻辑保证了编码的正确性。仿真结果显示设计满足功能时序要求。
A design of reconfigurable parallel Huffman encoder IP core is given in this paper. In the design the Huffman table is set to be reconfigurable to fit for multiple usages. And by improving the control logic of the packaging and assembling unit, the correctness of encoding can be ensured.Plenty of simulations show that the design meet both the functional and timing requirements.
出处
《微电子学与计算机》
CSCD
北大核心
2005年第2期9-12,共4页
Microelectronics & Computer
基金
"十五"民用航天项目的资助(20020112)
