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嵌入式CPU设计中Cache性能的全局优化 被引量:3

The Global Optimization of Cache Performance in Embedded CPU Design
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摘要 论文针对嵌入式CPU设计方法的特点,提出了两个层次的Cache全局性能优化方法。一个是应用程序层次,即基于编译技术的以循环和数据变换理论为基础的优化数据位置的全局优化方法;另一个是系统层次,即优化Cache索引的全局优化方法。这些方法对嵌入式CPU的设计具有重要的指导作用,能有效地提高嵌入式系统的整体性能。 According to the feature of embedded CPU design method, the paper presents two levels' global method of optimizing Cache performance. One is application level and the paper presents the method of optimizing data locality on the base of compile technology and loop and data transformation. The other is system level and the paper presents a global method of optimizing Cache index. These methods have some important guiding function and can improve whole performance of embedded system.
作者 谢满德
出处 《微电子学与计算机》 CSCD 北大核心 2005年第2期143-147,共5页 Microelectronics & Computer
关键词 嵌入式CPU CACHE 编译 数据变换 索引 Embedded CPU, Cache, Compile, Data transform, Index
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参考文献11

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同被引文献7

  • 1王熹微,唐昆,崔慧娟.基于DM642的视频编码Cache优化策略[J].微计算机信息,2005,21(09Z):84-86. 被引量:21
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