摘要
介绍了在Max+plusⅡ的EDA软件平台上,一种基于FPGA的数字式秒表的设计方法,给出了顶层电路图和各模块的设计。通过编辑、编译和器件编程,将编程器文件以在线配置方式下载到ISP实验板的EPF10K10LC84-4器件中,经实际电路测试验证,达到了预期的设计要求,显示结果正确无误。
This paper introduces a method of the design of stopwatch based on FPGA on the EDA software platform of Max+plusⅡ,and provides circuit diagram of the top layer and the design of each module.By editing,compiling and device programming,files of device programming In Circuit Configruable are downed load to the device of EPF10K10LC84- 4 of ISP experimental plate. It achieves the expectant requirements of design after actual circuit testing and verifying and it shows that the results are correct.
出处
《陕西工学院学报》
2004年第4期21-23,共3页
Journal of Shaanxi Institute of Technology
基金
陕西理工学院科研基金项目(SLG0333)。
关键词
现场可编程门阵列
在系统可编程
数字式秒表
field programmable gate array
in-system programmable
digital stopwatch
