一种采用较少加法器的FIR滤波器实现方法

Realization of FIR Filter with Minimum Adders

该文提出的无乘法器结构的滤波器实现方法主要基于移位相加操作、子表达式和乘法器模块的思想。首先提出部分共同子表达式概念,然后引入矩阵分析法寻找合适的部分共同子表达式,尽可能减少加法器数目。通过比较可以看出,采用这种结构的滤波器实现方法比一般方法大大节省硬件资源。另外,该文对所提出的'用部分共同子表达式减少加法器数目'的方法进行了理论分析,结果表明这种方法尤其适合于抽头系数较多的情况,可以大大减少搜索运算量。

This paper presents a realization scheme based on shifting and adding operation, sub-expression, and multiplier module. First it gives the definition of partly-common sub-expression. Then it introduces a matrix used for searching proper partly-common sub-expressions. Through the comparison, it is found that this presented realization scheme will use less hardware than ordinary schemes. In addition, theoretic analysis gives us a conclusion that this method especially fits for filters with many coefficients.