摘要
信号完整性的设计收敛已经成为当前深亚微米集成电路物理设计流程中的关键问题。对信号完整性收敛产生不利影响的有三个因素:串扰、直流电压降和电迁移。其中影响最大的是串扰,串扰噪声会产生大量的时序违规、逻辑错误。主要关注基于串扰控制的物理设计方法,包括新的流程、各个设计阶段对串扰的分析及修正的方法,以达到快速的时序收敛。并且根据真实的设计实例,提出了几点有效的控制串扰的方法和对于信号完整性管理比较有价值的观点。
Signal integrity closure is one of the key challenges in deep submicron physical design. The crosstalk IR-drop and electro migration are three main points which will influence the SI closure. Among these the crosstalk is the most signification, which generate lots of timing violations and function failure. A physical design methodology is proposed which includes signal integrity management through crosstalk noise analysis and repair at multiple phases in design flow. With these methods, a quick noise convergence can be achieved. One case study is presented to illustrate the effectiveness of the methodology and provide valuable suggestion useful for successful signal integrity management.
出处
《电子器件》
EI
CAS
2005年第1期146-149,共4页
Chinese Journal of Electron Devices
基金
国家自然科学基金低功耗内建自测试的可测性设计方法研究(60176018)。
关键词
信号完整性
串扰噪声
噪声预防
噪声修复
signal integrity
crosstalk noise
noise avoidance
noise repair