摘要
分别对300°C下采用等离子体增强化学气相淀积(PECVD)和700°C下采用热氧化技术制备应变硅沟道MOS器件栅介质薄膜进行了研究。采用PECVD制备SiO2栅介质技术研制的应变硅沟道PMOSFET(W/L=20μm/2μm)跨导可达45mS/mm(300K),阈值电压为1.2V;在700°C下采用干湿氧结合,制得电学性能良好的栅介质薄膜,并应用于应变硅沟道PMOSFET(W/L=52μm/4.5μm)器件研制,其跨导达到20mS/mm(300K),阈值电压为0.4V。
An investigation is made into preparations of thin gate-oxides for strained Si channel MOSFET's using PECVD at 300 °C and low-temperature (700-800 °C) thermal oxidation, respectively. It has been shown that strained Si-channel PMOSFET's (W/L=52 μm/4.5 μm) based on thin gate-oxides prepared by a combination of dry and wet thermal oxidation at 700 °C have a transconductance of 20 mS/mm (300 K) and a threshold voltage of 0.4 V, while strained Si-channel PMOSFET's (W/L=20 μm/2 μm) based on SiO_2 gate-insulator prepared by PECVD have a transconductance of 45 mS/mm (300 K) and a threshold voltage of 1.2 V.
出处
《微电子学》
CAS
CSCD
北大核心
2005年第2期118-120,124,共4页
Microelectronics
基金
模拟集成电路国家重点实验室资助项目(51439010303DZ0202)
