RISC微处理器中I/O子系统设计的一种优化方法

An Optimal Approach in Design of Input/Output Subsystem of RISC Microprocessor

低效率的访存操作是限制微处理器性能提高的一个关键因素。提出了I/O子系统(IOSS)设计中一种优化的模型,阐述了该模型提高访存效率的机制,分析了这种模型协调微处理器与存储器之间速度差异的作用。Verilog仿真、综合和静态时序分析的结果表明该设计达到了预定的要求。目前龙腾Ⅱ微处理器已经进入后端流程,不久将使用0. 18μm的工艺进行流片。

Low efficiency memory access is an important factor which limits the high performance of microprocessors. This paper presents an optimal design model in design of input/output subsystem of RISC microprocessor. This paper also introduces the mechanism of improving the efficiency of IOSS accessing memory,analyses the function in balancing the speed difference of microprocessor and memory. The result of simulation, synthesis and static time analysis show the design is successful. The Longten Ⅱ is now in back end process and will tape out on 0.18 μm CMOS technology sooner.