AHB总线仲裁器的设计

Design of an AHB Bus Arbitrator Device

介绍了AHB总线仲裁信号,对其仲裁机制和仲裁过程进行了详细的说明。在MAX+plusⅡ软件平台上,采用自顶向下的设计方法,将整个设计分为3个模块,底层模块使用甚高速集成电路硬件描述语言(VHDL)设计,然后包装入库,顶层文件采用原理图输入法,实现AHB总线仲裁器的设计,并给出仿真结果。

The development of the integrated circuit design has already entered the SoC(system on chip)era, and one of its important technologies is the technology of the bus on chip. AHB is one bus structure that ARM company introduced. It is used very extensively in the design of SoC. This paper introduces AHB bus arbitrating signal, and explains the arbitrating mechanism and its arbitrating process in detail. On MAX +plusⅡ software platform, we adopt the top-down design method, we design and divide it into three modules. The module of ground floor using VHDL languages is designed, then packed and put in storage, the top floor file adopts principle of picture input to realize the design of AHB bus arbitrating device. The simulated results are given.