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基于分组密码的跳频序列族构造 被引量:10

Structure of Frequency Hopping Sequences Family Based on Block Cipher
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摘要 基于迭代型分组密码的理论体系,本文从工程实现的角度提出了一种用于跳频码分多址通信系统的新型跳频序列族构造方法.该算法基于密码学的加密机制,具有好的安全性和高的计算复杂度;算法的设计遵循了密码学的“混淆”和“扩散”准则,生成序列具有各项优异的性能指标.本文从安全性、随机性、均匀性、复杂度、组网特性及跳频间隔特性等各方面对产生的跳频序列进行了全面的理论分析,证明该算法具有理想的综合系统性能指标.在此基础上,利用VHDL语言设计并开发出相应的跳频加密芯片.经测试其性能稳定、运算速度快、输入方式灵活多样,已应用于实际的高速跳频通信系统中. A family of frequency hopping sequences based on iterated block cipher is proposed for frequency-hopping multiple-access (FHMA) communications. The design offers a class of nonlinear FH codes with high security, large linear span and a uniform spread over the entire frequency bandwidth. Moreover, FH sequences among the family are independent from each other and they perform as well as random patterns in terms of multiple access interference in anti-jamming applications. With the performance of packet error and throughput for FHMA network being derived in theory, numerical results of the 3DES sequences are presented, comparing with those of shift register sequences and chaotic FH sequences. Efficiently implemented in field-programmable-gate-arrays (FPGA), the generator prototype of the proposed sequence has been realized and incorporated into fast FH radio.
出处 《电子学报》 EI CAS CSCD 北大核心 2005年第4期620-623,共4页 Acta Electronica Sinica
基金 国家自然科学基金(No60402040) 国家"十五"军事预研背景课题(No0200000110010303) 国家国防专利授权(No00130524.7)
关键词 分组密码 跳频序列 跳频多址接入 VHDL FPGA Applications Bandwidth Codes (symbols) Computer programming languages Computer simulation Field programmable gate arrays Jamming Shift registers
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参考文献15

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