JPEG 2000标准下二维离散小波变换高速VLSI结构设计

High-Speed VLSI Architecture Design for 2-D Discrete Wavelet Transform for JPEG 2000 Standard

提出一种基于JPEG2000标准下的二维离散小波变换高速VLSI结构,实现了提升离散小波变换.VLSI结构包含2个行滤波器、2个列滤波器和3个存储器模块;每个滤波器包含2个加法器和1个右移位除法器.行和列滤波器并行工作,整个结构的流水线设计方法增加了硬件资源利用率,加快了变换速度.二维离散小波变换结构已经过VHDL行为级仿真验证,并可作为单独的JPEG2000IP核应用于各种实时图像/视频芯片中.

A high-speed architecture that performed a 2-D discrete wavelet transform for JPEG 2000 standard was proposed. The architecture is designed for lifting based DWT. The architecture consists of two row filters, two column filters, and three memory modules. Each processor contained two adders, one right shifter. And they processed the signals in parallel way. The whole architecture was optimized in the pipeline design way to increase the transform speed, and achieve higher hardware utilization. The architecture had been implemented and simulated in behavioral VHDL. The architecture could be used as a compact and independent IP core for JPEG 2000 VLSI implementation and various real-time image/video applications.