一种基于语音识别SoC调试的JTAG接口设计

JTAG design based on a speech recognition SoC debug

在JTAG(jointtestactiongroup)工业标准的基础上,采用了一种基于语音识别SoC(SystemonChip)调试的JTAG接口设计.该设计以求用最少的硬件开销,最简单灵活的方式,支持寄存器查看和设置、IP核程序流跟踪、代码覆盖率检查、代码分析、IP核扫描测试等功能.该设计已经应用于以OpenRISC为核心的语音识别SoC设计平台上.

The paper uses a design of joint test action group (JTAG) debug system. With flexibility and the least hardware overhead, the design, which is based on JTAG standard, can give some powerful functions such as monitoring the registers, tracing the program flow of IP Core, executing coverage, profiling the code and scanning test for IP Core, etc. The design has been applied in a speech recognition SoC.