摘要
本文在分析已有的Turbo码译码算法的基础上提出了TD-SCDMA终端系统384kbpsTurbo码译码器的实现结构和方法,并通过FPGA进行硬件实现,给出了实现的资源占用和译码性能,证明该实现方法具有很高的经济意义和实用意义。
On the basis of analysis of the algorithm of Turbo code, this paper brings forward the implementation structure and method of a 384 kbps Turbo decoder in the mobile terminal system of TD-SCDMA, realizes it with FPGA, and offers the resource consumed and the performance of the decoder, which proves the way of implementation is of very high economic value and practical value.
出处
《电讯技术》
2005年第3期30-33,共4页
Telecommunication Engineering
基金
国家863计划项目(2004AA123140)
