数字式综合保护器可靠性分析与冗余容错设计

Reliability and redundant fault-tolerant design for digial integrated protection equipment

分析了数字综合保护器的可靠性以及对高爆开关运行可靠性的影响,提出了一种基于CPLD芯片的继电器冗余容错控制电路来提高数字综合保护器的可靠性,介绍了这种电路的工作原理和设计方法.试验结果表明,利用这一方法实现的基于DSP+CPLD的数字综合保护器具有很高的抗干扰性,能满足智能高爆开关高可靠性运行的要求.最后讨论了这种冗余容错控制电路的优点.

Analyzed the reliability of digital intergated protection equipment and its impact on the running reliability of HV explode isolation cabinet. It was proposed that a redundant falut-tolerance control circuit based on CPLD chip to enhance the reliability of digital intergated protection equipment. The principle and design method of this circuit was introduced. The test results proved that the digital intergated protection equipment based on DSP+CPLD implemented by this method has very high anti-interference, which satisfies the requirement for high reliability running of the intellectualized HV explode isolation cabinet. Finally, the advantage of this redundant falut-tolerance circuit were discussed.