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一种基于核设计的SOC测试控制体系结构 被引量:1

Test Control Architecture for System-on-Chip Based on Core-design
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摘要 随着集成电路复杂性的提高和SOC系统的出现,电路测试的难度也在不断增大,测试问题已经成为SOC设计的瓶颈。在研究了现存的测试控制结构后提出了基于核设计的SOC测试控制结构,它以边界扫描控制体系为基础,融合多种测试控制方法,支持不同类型的IP核进行测试。从而解决了SOC测试中控制部分的一些问题。 Along with the more complicacy of integrated circuit and the emergency of SOC system, the test of IC has become more difficult and this problem has been as the bottleneck of the SOC design. A test control architecture for core-based design is presented after studying some kinds of test control structures, basing on the boundary scan control system.This structure embraces some test techniques and can support different types of IP cores to test. This technique solves some questions of test control in SOC design.
出处 《计算机测量与控制》 CSCD 2005年第6期519-521,共3页 Computer Measurement &Control
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参考文献3

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  • 2Whetsel L. An IEEE 1149. 1 based test access architecture for ICs with embedded IP cores [A]. Int'l Test Conference [C].1997: 37-41.
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同被引文献5

  • 1胡瑜,韩银和,李晓维.SOC可测试性设计与测试技术[J].计算机研究与发展,2005,42(1):153-162. 被引量:42
  • 2杨鹏,邱静,刘冠军.嵌入式芯核测试标准IEEE Std 1500综述[J].测控技术,2006,25(8):40-43. 被引量:14
  • 3郑伟东.基于SOPC的数字电路边界扫描测试研究[D].北京:装甲兵工程学院,2009.
  • 4IEEE Std1500, IEEE Standard Testability Method for Embedded Core Based Integrated Circuits [S]. 2005.
  • 5M. Higgins, C. MacNamee, and B. Mullane, "IEEE 1500 Wrapper Control using an IEEE 1149. 1. Test Access Port [A]. " 16th lET Irish Signals and Systems Conference [C]. University College Galway, Galway, Ireland, 2008.

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