摘要
针对传统局部总线数据传输率低的缺点,对高速数据采集系统中数据实时传输问题进行了研究,提出了一种简单易用的高速数据采集系统中的PCI总线接口解决方案,为简化逻辑电路设计,论文采用CH365设计PCI接口、用FPGA实现FIFO数据缓存和本地总线控制逻辑,使得高速的A/D转换器有高速的总线与其相匹配,实践证明,采用该方法设计的数据采集系统具有成本低、传输速度快、应用方便等优点,有效地解决了数据的实时高速传输问题,为信号的实时处理提供了方便。
According to the shortcoming of slow data transferring about the traditional local bus, the method of real-time transferring of high-speed data acquisition system is studied, and the design of hardware about data acquisition based on PCI is proposed . In order to make the design simplified, CH365 is used to be PCI interface chip, and FPGA is used to be FIFO and local bus control logic, so the high speed A/D converter will match the high-speed bus. It is proved that the design with this method has the advantage of low cost, high speed and easy to use. It solves the problem of real-time transferring and saving effectively, and it also brings convenience for real-time processing the signal.
出处
《计算机测量与控制》
CSCD
2005年第6期606-608,共3页
Computer Measurement &Control
基金
广州市科技攻关项目(2002Z3-D0201)。