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基于IP设计的系统芯片测试策略

Test Strategy for SOC Design Based IP
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摘要 未来的系统芯片设计将基于IP设计,为了加强嵌入式核应用商和提供商之间的交流,确保系统芯片的快速上市,降低芯片的开发周期和开发成本,IEEE提出了P1500标准。从基于IP设计系统芯片的角度,对IEEEP1500标准的目的与意义、该标准定义的系统结构、标准的制订原则、测试的实现方式等角度对该标准进行详细的剖析,指出了该标准目前的进展状况和存在的问题,以及该标准与其他相关协议之间的关系。 SystemOnaChip(SOC)design in the future will be based on IP core. In order to enhance the communication between the core providers and the core users to reduce the time to market, the cycle of design and the cost, IEEE proposes P1500. From the aspect of SOC design based on IP core, several angles including the significance and purpose, the architecture of this standard, the rules in framing the protocol and the methods to implement the standard,a detail information about IEEE P1500 Standard is given. Furthermore, the research situation of the standard and some problems are proposed, and the relationship between this standard and others is given.
作者 陈新武 罗浩
出处 《计算机与数字工程》 2005年第6期12-14,94,共4页 Computer & Digital Engineering
基金 国家自然科学基金资助项目(编号:90207020)
关键词 系统芯片IEEE P1500 IP核 SOC, IEEE P1500,IP Core
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参考文献6

  • 1IEEE P1500 General Working Group Website, "IEEE P1500 Standards for Embedded Core Test", http://grouper. ieee. org/groups/1500.
  • 2IEEE Std 1149. 1 - 2001, IEEE Standard Test Access Port and Boundary- Scan Architecture[S] ,3 - 5.
  • 3IEEE Std 1149.4 - 1999, IEEE Standard for a Mixed Signal Test Bus[S], 10-12.
  • 41149.5 - 1995 IEEE Standard for Module Test and Maintenance Bus (MTM- Bus) Protocol[S] ,4 - 5.
  • 5Quasem, M.S.; Zhigang Jiang; Gupta, S.K.;Design & Test of Computers, IEEE , Volume: 20 , Issue: 3 ,2003:68 - 77.
  • 6Nahvi, M.; Ivanov, A.;Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on ,Volume. 23 , Issue: 7 , 2004:1128 - 1142.

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