一种加有延时的掉电数据保护电路

A Data Protection Circuit Engineering With Postpone Hour

本文对单片微型计算机中CMOS型SRAM的掉电保护电路进行分析,介绍了一种高要求应用系统,具有积分延时的掉电数据保护电路。

This paper aims at the analysis of a single microcomputer of type SRAM inside CMOS in droping electricity protection circuit and introduces a kind of the integral calculus postpone of dropping and giving or get an electric shock data protection circuit.