摘要
介绍了IP复用技术在ASIC设计中的重要性,探讨了IP核设计方法,并基于IP核可重用设计思想,创建了音乐IP硬核。IP核用Max+plusIIEDA软件进行软件仿真、用GW48系列SoC/SoPC试验开发系统进行FPGA验证,在SUN工作站上用Cadence后端设计软件Virtuso完成版图设计,在INMEC3.0μmmetalgateprocess流片。芯片经测试完全符合设计要求。
The paper introduces the essentiality of IP reuse technology in ASIC design firstly. Next, the IP reusable design methodology is discussed in the paper. At last, based on IP reusable design idea, music IP cores are designed. These IP cores are simulated with Max+plusII EDA tool and are emulated with FPGA tool (SoC/SoPC test development system of GW48 series). The layout of these IP Cores is designed with Cadence Virtuso software in SUN workstation. The music hard IP core is fabricated with 3.0μm metal gate process in INMEC. The chip is testified to be successful.
基金
浙江省教育厅科研计划项目(20030634)