一种高速定点FFT处理器的设计与实现

Design and Implementation of High Speed and Fixed-point FFT Processor

提出了一种高速定点FFT处理器的设计方法,此方法在CORDIC算法的基础上,通过优化操作数地址映射方法和旋转因子生成方法,每周期完成一个基4蝶形运算,具有最大的并行性。同时按照本文提出的因子生成方法,每个周期可生成3个旋转因子,且硬件实现简单,无须额外的ROM资源。整个系统采用Xilinx公司的XCV2P30仿真,系统频率达到了130MHz,对于1k点16位的复数FFT需要9.8μs,16k点需要221μs,优于目前绝大多数已有的FFT处理器。

The paper presents the design method of a high speed and fixed-point FFT processor. By optimizing the memory mapping algorithm and the generation of twiddle factors, the method based on CORDIC algorithm can calculate a radix-4 butterfly in one clock cycle and has the maximal degree of parallelism. This paper also introduces a method of twiddle factor generation, which can simultaneously generate three twiddles of one radix-4 butterfly. The implementation of the twiddle factor generation in hardware is simple and don't need extra ROM resources. The processor has been implemented on a Xilinx chip XCV2P30 and obtains the operating clock frequency at 130 MHz. The processor can compute a complex 1024-point FFT with 9.8 μs and 16384-point FFT with 221 μs. The performance of the FFT processor is better than most available FFT processors.