超深亚微米n沟道Si-MOSFET中栅介质的击穿

Gate Dielectric Breakdown of Very-Deep Sub-micron n-channel Si-MOSFET

通过改变Si-MOSFET的栅电压、源电压、漏电压和栅氧化层厚度等参数,分析和求解栅介质下载流子迁移率、沟道内电流密度、电场、雪崩产生密度以及隧穿电流的变化,得出当源、漏偏压分别为0.5V和1.0V时,增大栅极电压到18V时,栅氧化层(3nm)被永久性击穿;而在栅、源、漏偏压分别为5V、0.5V、1.0V不变时,减薄栅氧化层到0.335nm时,栅氧化层被永久性击穿。

In this paper, the carrier mobility, source voltage, current in channel, and avalanche generation under the gate dielectric of VDSM n-channel Si-MOSFET are analyzed by changing the gate voltage, the source voltage, the drain voltage and the thickness of gate oxide. It can be concluded that the gate dielectric is broken when the source voltage is 0.5V, the drain voltage is 1.0V and the gate voltage increases to 18V. When the gate voltage, the source voltage, the drain voltage are 5V, 0.5V,and 1.0V respectively, the thickness of the gate oxide decreases to 0.335nm.