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双栅MOS场效应管精确的二维电势分布与V_（th）的解析模型 被引量：3

An Accurate Dual Gate MOSFET's 2-D Potential Distribution and Analytical Model of V_(th)
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摘要 双栅（ＤｕａｌＧａｔｅ）ＭＯＳ场效应管所具有的完全对称的独特结构带来一系列电学特性变化引起了人们广泛的研究兴趣。本文利用格林函数法，采用合理的边界条件，得出ＤＧＭＯＳ体硅的二维电势解析表达式，并由此导出适用于亚微米沟道ＤＧＭＯＳ管阈值电压的解析表达式。阈值电压模型与有关实验数据符合甚好。对于进一步深入探讨ＤＧＭＯＳ管的体反型（ＶｏｌｕｍｅＩｎｖｅｒｓｉｏｎ）效应及其引起的电学特性变化，本模型提供了有效的途径。 The wide research interests have been attracted by series of electricalperformance variation of DG (dual gate)MOSFET due to its complete symmetricalunique structure. In this paper,2-D analytical electric potential is derived by usingGreen function method with reasonable boundary conditions and an analyticalthreshold voltage model suitable for submicron channel DG MOS transistor is alsoderived. The V,h model fits the experimental data quite well. It offers an effective approach to further research on volume inversion effect of DG MOS transistor and theelectric performance variation due to this effect.
作者 王晓晖 汤庭鳌 黄宜平
机构地区 复旦大学电子工程系ASIC与系统实验室
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 1994年第4期328-334,共7页 Research & Progress of SSE
关键词 MOS 场效应晶体管 阈值电压 短沟道效应 Dual Gate MOSFET, Threshold Voltage, Short Channel Effect
分类号 TN386.1 [电子电信—物理电子学]
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同被引文献19

  • 1Wong H S P,Frank D J,Solomon P M.NanoscaleCMOS.Proceedings of the IEEE,1999,87(4):537
  • 2Ieong M,Wong H S P.High performance double-gate device technology:challenges and opportunities.Proceedings of International Symposium on Quality Electronic Design,2002:492
  • 3Rudan M,Odeh F.Multi-dimensional discretization scheme for the hydrodynamic model of semiconductor equations.COMPEL,1986,5(3):149
  • 4Balestra F, Cristoloveanu S, Benachir X, et al. Doub le-gate silicon-on-insulator transistor with volume in version: A new device with greatly enhanced perform anee[J]. IEEE Electron Device Letters, 1987, 8(9) 410-412.
  • 5Lu Huaxin, Yuan Taur. An analytic potential model for symmetric and asymmetric DG MOSFETs [J]. IEEE Transactions on Electron Devices, 2006, 53(5): 1161-1168.
  • 6Tanaka T, Suzuki K, Horie H, et al. Ultrafast operation of V,hadjusted p^+-n^+ double-gate SOI MOSFETs [J]. IEEE Transactions on Electron Devices, 2004, 51 (9): 1385 1391.
  • 7Frank D, Dennard R H, Nowak E, et al. Device scal- ing limits of Si MOSFETs and their application de- pendence[J]. Proceedings of the IEEE, 2001, 89(3) :259-288.
  • 8Liang Xiaoping, Yuan Taur. A 2-D analytical solution for SCEs in DG MOSFETs[J]. IEEE Transactions on Electron Devices, 2004, 51(8): 1385-1391.
  • 9Gupta S K,Baishya S.3D-TCAD simulation study of an electrically induced source/drain cylindrically surrounding gate MOSFETs for reduced SCEs and HCEs[J].IEEE Transactions on Electron Decivces,2011,11(3):429-432.
  • 10Dubey S,Santra A,Saramekala G,et al.An analytical threshold voltage model for triple-material cylindrical gate-all-around(TM-CGAA)MOSFETs[J].IEEE Transactions on Nanotechnology,2013,12(5):766-774.

引证文献3

二级引证文献3

固体电子学研究与进展
1994年 第4期

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