摘要
针对DVB-S前端基带处理系统的RS编码提出比特并行的迦罗华域乘法部件,乘法电路中所涉及的仅仅是自然基下二进制向量表示中二进制数的位乘(按位与)和位加(按位异或)的组合所代表的多项式运算,有效的提高了整个系统的处理速度。
In This paper, a new byte parallel multiplication component of Galois field for RS encoder in DVB-S front end baseband processor in propsed. The multiplication circuit only involves the polynomial operation which is composed of bit-mul- tiply and hit-add based on the binary system vector of conventional basis, it effective improves the processing speed of the whole system.
出处
《电子测量技术》
2005年第3期77-78,共2页
Electronic Measurement Technology
