自定制浮点FFT/IFFT处理器的FPGA实现研究

Study on the FPGA realization of a self-defined floating-point FFT/IFFT processor

针对定点FFT/IFFT处理器精度不高的缺点,提出了自定制浮点FFT/IFFT处理器的FPGA硬件实现。结合工程需求和FPGA器件结构确定了自定制浮点数据格式,阐述了实现浮点运算和提高蝶形运算速度等关键技术,并用FPGA实现了一个可变数据长度的FFT/IFFT处理器。该处理器已投入实用,工作性能稳定,系统时钟80MHz,完成1024点FFT/IFFT运算只需64μs,处理误差小于-80dB,功耗小于1W。

The FPGA realization of a self-defined floating-point FFT/IFFT processor is proposed to get over the poor precision of a fixed-point FFT/IFFT processor. The floating-point format is defined based on the demands of engineering and the features of the FPGA, and the key techniques including implementing the floating-point computation and improving the operating rate of butterfly computation are discussed, then an FFT/IFFT processor with variable data length is realized using FPGA, Such a processor has been put into service and has achieved a stable performance. Its operating frequency is 80MHz and it can finish 1 024-point FFT/IFFT in 64 μs with the error less than -80 dB and power less than 1 W.