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CMOS分数频率综合器设计技术 被引量:5

Design Techniques for CMOS Fractional-N Frequency Synthesizer
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摘要 现代无线通信要求频率综合器同时满足快速切换时间,小信道宽度和低噪声性能三方面的要求。分数N频率综合器在这方面的优良特性使得它在现代无线通信系统中被广泛使用。文章系统地讨论了用CMOS工艺实现分数频率综合器的技术问题,并对频率综合器的发展方向和面临的挑战提出了一些看法。 Modern wireless communication requires that the frequency synthesizer should have fast settling time,small channel width and low phase noise. Fractional-N frequency synthesizer is widely used due to its excellent performance in these aspects. Design techniques for CMOS Fractional-N frequency synthesizers are systematically discussed in the paper. Finally, the research direction of the frequency synthesizer, as well as challenges in the development, is analyzed in brief.
出处 《微电子学》 CAS CSCD 北大核心 2005年第4期394-399,共6页 Microelectronics
基金 国家高技术研究发展计划资助项目(60475018) 国家重点基础研究发展规划资助项目(G2000036508)
关键词 频率综合器 鉴相/鉴频器 电荷泵 环路滤波器 压控振荡器 分频器 ∑-△调制器 Frequency synthesizer Phase/frequency detector Charge pump Loop filter VCO Frequency di-vider ∑-△ modulator
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参考文献38

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同被引文献25

  • 1唐长文,何捷,闵昊.一种采用开关阶跃电容的压控振荡器(下):电路设计和实现[J].Journal of Semiconductors,2005,26(11):2182-2190. 被引量:3
  • 2黄水龙,王志华,马槐楠.一个自调谐,自适应的1.9GHz分数/整数频率综合器[J].电子学报,2006,34(5):769-773. 被引量:5
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