摘要
以AWG(任意波形发生器)控制器的设计和实现为例,介绍了一种将原理图和VerilogHDL相结合的CPLD(复杂可编程逻辑器件)设计方法。首先概述AWG的系统总体方案和控制器各功能模块的作用,并给出系统的硬件结构框图,接着详述了数字系统设计思路和内部功能模块,给出了顶层设计的原理图,并以数据切换、地址分配电路为例介绍VerilogHDL语言编写底层模块,给出DDS(直接数字频率合成)方式下数据切换模块和系统工作的仿真图形。
Taking the design and implementation of the arbitrary waveform generator (AWG) as an example, this paper aims to introduce a method applied in the AWG controller. Firstly the whole construction of the AWG and the role of each module in the controller are described. Then the hardware and schematic & verilog HDL design is presented in detail, the source code and emulation graph are also given. Finally the characteritics of the design are summarized.
出处
《电子工程师》
2005年第5期26-28,共3页
Electronic Engineer