用高速数字信号处理器实现雷达视频杂波模拟

Radar Video Clutter Simulation with High Speed Digital Signal Processor

研究了雷达视频杂波的实时模拟方法。雷达杂波通常为随机过程。假定杂波包络服从莱斯分布，其功率谱为立方型，这种杂波可用伪随机序列通过特定的滤波器产生。杂波滤波器组可用ＴＭＳ３２０Ｃ２５数字信号处理器完成，并与缓冲存储器相结合，实现Ｉ，Ｑ两路杂波数据实时输出．ＴＭＳ３２０Ｃ２５数字信号处理器运算速度高、指令功能强，有利于提高杂彼模拟速度和模拟器的可编程性．实验中选用双极点递归滤波器产生立方谱杂波数据。计算机仿真表明，输出模拟杂波的幅度为莱斯型，功率谱密度分布为立方型。文末给出了实验样机的程序流程图、电路原理框图，讨论了单片ＴＭＳ３２０Ｃ２５在每个重复周期内能产生的杂波单元数。

The real-time simulation of radar video clutter is addressed. Clutter return is generally modeled statistically as, a random process, with Ricean amplitude distribution and cubic power density spectrum. The clutter data can be synthesized by passing a sequence of random numbers through digital filters realized with TMS320C25 digital signal processor, the unit impulse response of which has the specified spectral shape. The features of high-speed and powerful instructions of the processor speed up the procedure in simulation and make the simulator programmable. Two-pole filters have been selected to synthesize the clutter data in the experiment. The simulation results indicate that the amplitude distribution and the power density spectrum are in good agreement with Rice type and cubic type respectively. The realp-time simulation software flowchart and hardware block diagram are given. How many clutter cells could be simulated per PRI is also discussed.