集成电路中多晶硅薄膜载流子迁移率的实验研究和理论模型

Experimental and Theoretical Research for Carrier Mobility of Thin Polycrystalline Silicon Films in Application of VLSI

本文系统地研究了多晶硅薄膜载流子迁移率与掺杂浓度的关系,发现不仅如前人所指出的那样,多晶硅载流子迁移率在中等掺杂区有一极小值,而且同时在高掺杂区存在一个极大值.本文将前人提出的杂质分凝模型、晶粒间界陷阱模型和杂质散射机构结合起来,从理论上计算了极大值及其相应的掺杂浓度与晶粒大小、晶粒间界界面态密度的关系,并与实验结果进行了比较.理论模型较好地说明了实验结果.

The relationship of carrier mobility of polycrystalline silicon films vs.doping concentra-tion has been investigated theoretically and experimentally.It is shown that the carrier mobilitywill not only take a minimum at a intermediate doping level,just like what has been pointedout by other researchers,but also take a maximum at a high doping level.The existing modelscan not predict the mobility vs doping concentration completely.Based on the carrier segre-gation model and carrier trapping model combined with the impurity scattering mechanism,the effects of grain size and the density of trapping states at grain boundaries on the maximumof carrier mobility have been calculated theoretically.The experimental results have been ex-plained by the theoretical model satisfactorily.