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NoC功耗与性能的研究 被引量:1

Power consumption and performance of network on chip
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摘要 在当前高性能片上网络设计中,功耗和延迟是设计所面临的核心问题之一。在此着重阐述了构成低功耗和低延迟NoC的4种结构:低摆幅的信号传输结构、可重构的NoC结构、3D的IC设计结构、基于数据压缩机制的结构。通过对其功过原理的分析,比较了4种结构的优缺点,最后对未来低功耗、低延迟的NoC发展方向做出了预测。 The power consumption and time-delay are the most important design constraints in the high-performance NOC(network on chip) design.Four structures of NOC with low power consumption and low time-delay are elaborated: low swing signal transmission structure,reconfigurable NOC structure,3-D IC design structure and structure based on data compression mechanism.The advantages and disadvantages of the four structures are compared by the analysis of the theoretic diagram and the principle of each type of NOC.Finally,the development directions of the low power consumption and low time-delay NOC are predicted.
出处 《现代电子技术》 2012年第4期173-176,共4页 Modern Electronics Technique
关键词 NOC 低功耗 低延迟 3D NOC low power consumption low time-delay 3D
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参考文献4

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共引文献30

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