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基于K参数思想的快速三维互连电感电阻提取算法 被引量：4

Fast Inductance and Resistance Extraction of 3-D VLSI Interconnects Based on the Method of K Element
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摘要 在GHz以上高频集成电路中,电感寄生效应已严重影响了电路性能,必须研究有效的算法提取互连电感电阻.本文基于K参数(电感矩阵的逆)较好的局部化特性,提出适应高频情况的互连电感电阻提取算法.通过采用有效的窗口选择技术和导体细丝划分,以及在细丝电感计算复用和导纳矩阵求逆两方面的改进,本文算法可有效处理复杂的多层互连结构,在保持较好精度的情况下,计算速度比FastHenry快上百倍. In the integrated circuits with frequency above several GHz, parasitic inductive effect has greatly influenced the circuit performance,tberefore requiting efficient algorithm for extraction of frequency-dependent inductance and resistance. Based on good localization property of the K element （inverse of the partial inductance method） ,a fast algorithm for interconnect inductance and resistance extraction is proposed in this paper. With an efficient window selection technique,filament partitioning, and two improvements on calculating filament inductance and inverting the global admittance matrix, complex structures of multilayered interconnects can be handled very well.While preserving good accuracy,the presented method exhibits about 100x speed-up over the FastHenry for some actual examples.
作者 魏洪川 喻文健 杨柳 王泽毅
机构地区 清华大学计算机科学与技术系
出处 《电子学报》 EI CAS CSCD 北大核心 2005年第8期1365-1369,共5页 Acta Electronica Sinica
基金 国家863高技术研究发展计划(No.2004AA1Z1050) 国家自然科学基金(No.90407004)
关键词 三维互连 电感电阻提取 K参数 高频率 窗口技术 3-D VLSI interconnect extraction of inductance and resistance K element high frequency the window technique
分类号 TN47 [电子电信—微电子学与固体电子学]
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参考文献12

  • 1K Gala,D Blaauw,J Wang, et al. Inductance 101:analysis and design issues[ A]. Proc. Design Automation Conference [ C ]. New York, USA:AC, M press,2001.329 - 334.
  • 2M W Beattie, L T Pileggi. Inductance 101 : modeling and extraction[A]. Proc. Design Automation Conference[C]. New York, NY, USA:ACM press,2001.323 - 328.
  • 3A E Ruehli. Inductance calculation in a complex integratd circuit environment[ J].IBM Journal of Research and Devdopment, 1972,16:470-481.
  • 4Z He, M Celik, L T Pileggi. Spie: Sparse partial inductance extraction[ A]. Proc. Design Automation Conference[ C ]. New York, NY, USA:AC, M press, 1997.137 - 140.
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  • 9A Devgan,H Ji,W Dai. How to efficiently capture on-chip inductance effects:Introducing a new circuit element K[ A]. Proc. IEEE International Conference on CAD[C] .Los Alamitos, Calif, USA: IEEE Ceomputer Society press,2000.150 - 155.
  • 10H Ji, A Devgan, W Dai. KSim: A stable and efficient RKC simulator for capturing on-chip inductance effect [ A ]. Proc. ASP-DAC [ C ]. New York, NY, USA: ACM press,2001.379 - 384.

同被引文献22

  • 1Beattie M W, Pileggi L T. Inductance 101: modeling and extraction[C] //Proceedings of Design Automation Conference, Las Vegas, Nevada, 2001 : 323-328.
  • 2Ruehli A E. Inductance calculation in a complex integrated circuit environment [J]. IBM Journal of Research and Development, 1972, 16(5): 470-481.
  • 3He Z, Celik M, Pileggi L. SPIE: sparse partial inductance extraction[ C] //Proceedings of Design Automation Conference, Anaheim, California, 1997:137-140.
  • 4Devgan A, Ji H, Dai W. How to efficiently capture on-chip inductance effects: introducing a new circuit element K [C] // Proceedings of IEEE International Conference on CAD, San Jose, California, 2000:150-155.
  • 5Du Y, Dai W. Partial reluctance based circuit simulation is efficient and stable [ C] //Proceedings of Asia and South Pacific Design Automation Conference, Shanghai, 2005:483-488.
  • 6Yu H, He L. A provably passive and cost-efficient model for inductive interconnects [J]. IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, 2005, 24(8) : 1283-1294.
  • 7Ji H, Devgan A, Dai W. KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect [ C ] // Proceedings of Asia and South Pacific Design Automation Conference, Yokohama, 2001:379-384.
  • 8Chen T-H, Luk C, Chen C C -P, et al. INDUCTWISE: inductance-wise interconnect simulator and extractor [J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2003, 22(7): 884-894.
  • 9Beattie M, Pileggi L. Efficient inductance extraction via windowing[C] //Proceedings of Design Automation and Test in Europe, Paris, 2001:430-436.
  • 10Kamon M, Tsuk M J, White J K. FASTHENRY: a multipoleaccelerated 3D inductance extraction program [J]. IEEE Transactions on Microwave Theory and Techniques, 1994, 42 (9) : 1750-1758.

引证文献4

电子学报
2005年 第8期

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