OFDM系统中傅里叶变换的硬件实现方法

A VLSI Design of High-Efficient FFT Processor for OFDM System

在宽带OFDM系统中,FFT处理器是一个重要组成部分。文章介绍了一种适合OFDM系统的高效FFT处理器的VLSI设计方法,针对高效的特点采用了改进的Radix-4DIT算法,乒乓RAM的设计思想,以及流水线结构。根据Radix-4算法的特点,在基4运算单元CU(Computing Unit)设计,存取地址混序,每级迭代控制,数据对齐等方面也有一些特点。文章针对256点,36bit位长,浮点复数进行FFT运算。目前,此FFT处理器已经通过了FPGA验证,处理能力为100MSPS。

The FFT processor is an important part of the width-band OFDM system.In this article,a design of a highefficient FFT processor in VLSI is presented,this processor is based on modified Radix-4 algorithm,ping-pong RAM design and super pipelining architecture.According to the feature of Radix-4 algorithm,special techniques such as computing unit design ,iteration control ,synchronization of data are introduced.The processor is designed for 256 sample, 36bit,float,complex FFT computing.This processor has been implemented in FPGA so for,the performance has reached 100MSPS.