超大规模集成电路的可制造性设计

Design for Manufacturability of VLSI

以Synopsys推出的TCAD软件TSUPREM-Ⅳ和Medici为蓝本,结合100nm栅长PMOSFET的可制造性联机仿真与优化实例,阐述了超大规模集成电路DFM阶段所进行的工艺级、器件物理特性级优化及工艺参数的提取。

With the Synopsys TCAD design tools including TSUPREM-Ⅳ and Medici, the process and device simulation are introduced by extracting and comparing the characteristics of the 100 nm gate length PMOSFET transistors with different process conditions and parameters.