摩托罗拉MC683609与SDRAM接口逻辑设计

The Interface of design between MC68360 and SDRAM

使用VHDL语言实现MC68360微处理器和SDRAM之间的接口控制电路,为摩托罗拉68xxxCPU在开发设计中使用SDRAM提供一种灵活,高效,可靠的解决方案。文中提到的接口电路设计有别于其他IP核的SDRAM控制器,只要简单理解计算机系统中片选信号,读写信号、时钟及数据和地址总线的含义就可以实现对SDRAM的多种方式的操作。可以广泛适用于时钟在5MHz以上任何一种通用的微处理器和SDRAM接口设计应用中。并在实践中得到广泛应用。

It describes a new interface-control methodology to implement an interface between MC68369 and SDRAM with ／HDL whieh provides a flexlble,reliable and efficient solution in Design with Motorola 68xxx CPU. The difference between this interface eireuit in this paper and other IP SDRAM eontrnller is to manipulate SDRAM easily .and do not need to be familiar with any specific computer system. It only need to know about Chip select. Read or Write signals. Address Bus, Data Bus, SDRAM . It can be used widely in many kinds of microcomputer svstem which clock frequency is 5MHz and more.