摘要
引入一种称为Clock的变迁,用来改进TPNs,讨论了如何将时序图转换为基于Clock变迁的TPNs,使这种TPNs能正确反映时序图的流程和时间约束。最后,利用普通Petri网的可达性分析技术对时序图模型进行了分析和验证。
The paper focuses on how to transform UML sequence'diagram into such a TPNs improved by invoking a new transition called Clock and the TPNs model can reflect workflow and time constraints of sequence diagram correctly. It analyzes and verifies sequence diagrams based on the technology of reachability analysis of basic Petri nets at last.
出处
《计算机工程》
EI
CAS
CSCD
北大核心
2005年第19期105-107,共3页
Computer Engineering