单片音频解码芯片的设计

The Design of a Single Chip Audio Decoder

论文设计了单片音频解码芯片,完成了定点解码MPEG1/2音频部分的实时处理,并对解码过程中运算量大的IMDCT和综合子带滤波器两部分进行了优化分析。通过优化算法,使得18-36点的IMDCT仅需58次乘法和80次加法,综合子带滤波器输出一个样点只要15.75次乘法和14.75次加法,实时解码时芯片的工作频率仅为36.5MHz,芯片还使用分层总线架构,进一步降低了芯片的功耗。

A single chip audio decoder is proposed to implement real time decoding of MPEG1/2 audio stream.Through the optimization of the IMDCT and synthesis sub-band filter of audio decoding algorithms,the computation complexity of 18-36 points IMDCT is reduced to 58 multiplications and 80 additions;and the complexity of synthesizing the one example output of the sub-band filter is reduced to 15.75 multiplications and 14.75 additions too.The main clock of the decoder is 36.5MHz.Hierarchical bus architecture is also adopted to reduce power consumption.