1.5Gbps高速串行数据恢复电路的标准单元实现

1.5Gbps High Speed Serial Data Recovery Circuit Made from Standard Cells

在高速串行接口芯片的设计中,高速串行数据恢复电路是设计中的一个难点,由于其高达千兆的传输频率,大多采用模拟电路方式实现·然而同数字电路相比,模拟电路在噪声影响、面积、功耗、工艺敏感度和可测性方面都存在较大的劣势·提出了一个应用于SATA1·0中1·5Gbps高速串行接口的高速串行数据恢复电路,它没有用PLL或DLL等模拟电路的方法,它采用完全数字电路的设计,并用标准单元实现·与用模拟电路实现的串行数据恢复电路相比,此电路设计更加简单易实现,数据恢复快速,而且面积小功耗低·电路被应用在PATA/SATA桥接芯片的设计中,并在标准0·18CMOS工艺下投片生产·

In high speed serial interface integrated circuit design, the design of high speed serial data recovery circuit is a troublesome task. At gigabit transition rate, gigabit integrated circuits usually use analog circuits to perform gigabit rate functions such as clock generator and clock data recovery circuit. Compared with digital circuit, analog circuit has a lower noise tolerance, needs more area and power consumption, is more sensitive with process change, and has a lower testability. Additionally, integrating a large amount of analog circuit in a digital system is very difficult. In this paper an all-digital high speed serial data recovery circuit module for 1.5Gbps SATA interface implement is introduced. Without using PLL or DLL analog circuit, this circuit is an all-digital circuit made from standard cells. In contract to other design made from analog circuit, this all-digital circuit is an easily implemented design and it has lower power consumption and smaller area. This circuit is being implemented in an ATA/SATA interface controller chip which is designed and manufactured using a 0.18um CMOS process.