一种快速的分数位平面编码方法及其电路结构

A Fast Fractional Bit-Plane Encoding and Efficient Architecture

JPEG2000是新一代图像压缩国际标准.它在位平面编码技术的基础上,进一步采用了分数位平面编码技术.分数位平面编码使编码输出的码流具有更高的渐进性和抗干扰性,但是,它使编码的运算量大幅度增加.为实现快速编码,该文提出一种位平面、过程双重并行编码方法,可以大幅度提高编码速度.另外,为降低大数量并行编码消耗的电路资源量,文中提出一种局部模块并行电路结构.实验结果显示,该文方法的编码速度约为每时钟编码一个系数,比已有技术提高约15倍.在FPGA电路平台上,只需要约4·2K的逻辑单元,因此它是一种可以通过低成本集成电路实现的快速分数位平面编码技术.

JPEG2000 is a new image coding standard, based on the fractional bit-plane coding. The fractional bit-plane coding enables the code-stream more scalable and robust, but it increases encoding computation greatly. For fast encoding, the bit-plane and pass dual-parallel approach is presented in this paper, which reduces the encoding time significantly. And for decreasing circuit requirement for the parallel coding, a partial module-parallel architecture is proposed. The test results show that above technique is able to encode about one coefficient per clock-cycle, 15times existed techniques. And it needs merely 4.2K logic cells in FPGA device so it can be implemented with low cost integrated circuit.