低功耗高电源抑制比CMOS带隙基准源设计

Design of CMOS Bandgap Voltage Reference with Low power and High PSRR

基于Ahujia基准电压发生器设计了低功耗、高电源抑制比CMOS基准电压发生器电路.其设计特点是采用了共源共栅电流镜,运放的输出作为驱动的同时还作为自身的偏置电路;其次是采用了带隙温度补偿技术.使用CSMC标准0.6μm双层多晶硅n-well CMOS工艺混频信号模型,利用Cadence的Spectre工具对其仿真,结果显示,当温度和电源电压变化范围为-50-150℃和4.5-5.5 V时,输出基准电压变化小于1.6 mV(6.2×10-6/℃)和0.13 mV;低频电源抑制比达到75 dB.电路在5 V电源电压下工作电流小于10 μA.该电路适用于对功耗要求低、稳定度要求高的集成温度传感器电路中.

The design of CMOS bandgap voltage reference （BGR） with high power supply rejection ratio （PSRR） and low power dissipation was described . The cascade current mirror was used in the circuit, and the output of the OPAMP was used for the bias of itself and to drive the next stage. CMSC 0.6 μm 2 ploy n-well CMOS mixture signal model and Cadence Spectra tool were used for simulation. Simulation results showed that the output voltage varied lower than 1.6 mV（6.2 × 10^-6/℃） and 0.13 mV with a temperature range of -50 ℃ to 150 ℃ and the supply voltage ranged from 4.5 V to 5.5 V respectively. The low frequency PSRR was higher than 75 dB and the maximum supply current was 10μA with 5 V supply. This circuit will be applicable to low power dissioation, high stability temperature sensors.