一种应用于SoC的总线系统模拟验证方法

A Simulation-Based Verification Method for SoC Bus System

提出一种基于模拟仿真和覆盖率分析的方法.通过前期使用带约束的随机测试向量进行模拟仿真、在达到一定覆盖率后进行覆盖率分析、然后手工生成测试向量提高覆盖率的方法,对一款SoC芯片的总线系统进行验证,有效地减少了验证仿真所需时间,得到了预期的验证结果.

We propose a simulation-based method in the verification of SoC bus constrained-random vector is used to make simulation first; then a coverage system. By the method, analysis is made in the simulation process until a certain coverage statistics is obtained. Finally, the test vector is manually generated. We use this method to verify a SoC system and get a satisfactory result by reducing the time of simulation effectively.