摘要
利用Altera公司的FPGAA(CEX1KEP1K30TC144-3)器件为主控器。在软件上,采用VHDL硬件描述语言编程及并行BCD数减法实现BCD数除法的实现方法,极大地减少了硬件资源的占用。与单片机为主控器的频率计相比,软件设计语言灵活,硬件更简单,速度更快。实践证明,利用FPGA设计较复杂的数字系统,电路性能可靠,设计的周期较短,可移植性好,具有很强的实用性。该系统在1Hz～60MHz范围内,测量精度在全域范围内相对误差恒为十万分之一。
In this paper, FPGA（ACEX1K EP1K30TC144-3） device is a main controller. At software, it adopts VHDL programming and exploits the BCD code division implementation method realized by parallel BCD code subtraction, the method reduces the taking up of resources of the hardware greatly. Compared with the cymometer of the main controller with MCU, the software design language is flexible, the hardware is simpier, and the speed is faster. Experiment show that within the range of 1Hz-60MHz, measurement precision owns relative error 1/100,000 within the range of universe.
出处
《电测与仪表》
北大核心
2005年第10期27-29,16,共4页
Electrical Measurement & Instrumentation
